|MadSci Network: Engineering|
I liked your question. I worked for a company that made RTP (Rapid Thermal Processing) equipment that can be used for implant annealing, but didn’t know about implanting silicon with silicon. However, one of my friends who is still in the business helped me out with this question. I can’t get into details about ion implantation here, but the book I looked at was S.M. Sze’s “VLSI Technology,” 2nd edition, McGraw-Hill. First a little background. The main purpose of ion implantation is to be able to get precise spatial control of dopant profiles that you want to introduce into your crystal, usually silicon. [Incidentally, it is not unusual to implant silicon in GaAs, which is probably the second (though a very distant second to silicon) most common crystal used in semiconductor devices.] The alternative to ion implantation is a surface predeposition using, typically, a doped glass followed by a high temperature step where diffusion drives the dopants in a ways. The trouble with diffusion is that you don’t get sharply defined, well localized dopant profiles. This wasn’t so bad in the early days of integrated circuits, but became a major limitation as devices shrank in size. [About 25 years ago the minimum device feature size was 10 microns; now it is of the order of .2 microns.] Ion implantation fires atoms that have been ionized and accelerated with electric fields right into the wafers. A mask is applied to the wafer so you only implant in areas that you desire to implant in. Ion implantation gives sharp dopant profiles except for a nasty effect known as channeling. The dopant depth profile starts to cut off fairly sharply but then it hangs in there and starts dropping off at a much slower rate. This is due to the fact that along certain directions, the crystal appears to have long corridors, or channels, that ions can move down without much scattering. The analogy that is usually given to explain this is that when you drive by an orchard you can look in certain directions and see a long ways due to the regular spacing of the trees. A chunk of single crystal silicon is the ultimate “orchard” of neatly arranged silicon atoms. One standard trick is to implant at an angle of 7 degrees to the normal. However, while this helps, it is still possible for ions to get scattered into directions that “see” these corridors, and so you still get channeling. By the way, typical ion implant energies are of the order of 30 to 100 keV (thousand electron Volts), and implant depths are of the order of .1 to .3 microns. These numbers are just typical numbers. Some implant work has been done around an MeV (million electron Volts), and some is done at lower energies. Here is where one of the uses of silicon ion implantation comes in. Before one of the major ion implants, such as the source/drain implant, an implant of silicon is done which leaves some silicon atoms in interstitial sites, basically plugging up the channels. When a subsequent implant is done, the channels are not open, so the dopant profile cuts off sharply, as desired. Pretty clever, huh? Most of the atoms that are implanted do not find their way into a lattice position (since they are all taken in a perfect crystal), but wind up wedged in between atoms in the lattice at so called interstitial sites. It is true that some of the original silicon implant goes pretty deep, but that is not a problem. At the low temperatures where the ion implant is done, all the atoms in the lattice are nearly frozen in place, making it difficult for the atoms to play the musical chairs game necessary to find a place in the lattice. At some point in the process, an annealing step is done where the wafer is heated up to a high temperature long enough for the atoms to find their way into the lowest energy positions, which is back into the regularly spaced lattice sites. This occurs because when the wafer is heated up, all the atoms have more kinetic and vibrational energy, making it easier for them to hop around in the crystal. Therefore, after annealing, most of the silicon and the dopants wind up being incorporated into the lattice. [By the way, this annealing step is crucial. Without it the mobility of electrons and holes in the lattice is greatly reduced. I don’t know if this is due to scattering (which is what it sounds like) or recombination (where an electron and hole recombine, knocking out two carriers) or both.] Another application of silicon ion implantation into a silicon IC is when it is used in titanium silicide formation. Titanium silicide is a reasonably good electrical conductor that makes connections which serve as the wires that connect the various circuit components. Titanium silicide is formed when titanium is deposited on polysilicon and then heated up. The silicon atoms in the polysilicon diffuse up into the titanium, forming a compound of silicon and titanium. Titanium silicide is able to take subsequent high temperature processing steps without melting, in comparison to aluminum. Before the high temperature siliciding step is carried out and after the titanium has been deposited, a silicon ion implant is carried out. Now, it is thought that if there is any barrier between the polysilicon and the titanium, such as a thin layer of silicon dioxide, then the diffusion of the silicon up into the titanium will be hampered, forming a patchy, incomplete silicide. The silicon ion implant actually goes through the titanium and is thought to partially break up any barrier at the interface between the titanium and the polysilicon. Well, that’s it. Not being an expert in IC processing, I probably have made some mistakes here. Sze’s book is a classic (which people actually read!), and should be consulted for more information and a good collection of references. I hope that answers your question.
Try the links in the MadSci Library for more information on Engineering.