Re: Exist teorical limits in the shirink of a microchip?

 
Greetings:

Your question is of great interest today and we are all looking into the 
future to understand the issues as we move from microelectronic integrated 
circuits (IC) to nanometer ICs.


Gordon Moore of Intel Corp, who predicted in 1965 that the density of 
integrated circuits (IC) would double every year, feels his rule will 
probably hold for another 10 years  After that, electronics will hit a 
disruptive discontinuity, beyond which the future is unknown. (Note: Moore's 
rule actually became a doubling every 18 months for the past 30 years!)

 Currently the delay of metal interconnects is about the same as transistor 
delays and feature sizes are shrinking below the wavelength of ultraviolet 
light.  Complete testing of IC functions is now near impossible because of 
the sheer complexity of the circuits. Moore is confident solutions will 
be found and the industry will move from the current state-of-the-art 0.35 
micrometer (350 nanometer) designs through 250 nm to 180 nm.

Currently deep ultraviolet (UV) lithography is providing 250 nm features. 
Going to 180 nm design rules may require entirely new technology. Excimer-
laser sources at 193 angstrom wavelengths would get you there, but so would 
248 angstrom (2480 nm) sources using phase-shift masking. Phase-shift masks 
use the wave nature of light to create sharper optical boundaries through 
interference effects. Then the step from 180 nm to 130 nm could be 
accomplished with excimer-laser sources using phase-shifting masks. But all 
current methods have problems:
  
Current problems are that deep-UV projection requires optimal surface 
smoothness.  X-rays solve the wavelength problem, but cannot be optically 
manipulated so require extremely precise registration.  Electron-beam 
systems offer the ultimate in precision, but  throughput is unacceptable 
because the entire circuit must be written sequentially on each wafer.
  
Wiring problems are being addressed with a combination of improved 
dielectrics and better interconnect metals such as IBM's recent success 
with copper interconnects. 

As you point out in your question power scaling will become a critical 
problem. While power requirements conveniently scale down with feature size 
(at least for individual devices) you also have to consider the clock 
frequency, chip size and voltage levels.  Moving from 250 nm to 180 nm 
will increase power dissipation by a factor of 40 leading to severe cooling 
problems. Total immersion of the ICs in cooling liquids is the best 
solution to this problem so far.  However, new quantum mechanical tunneling 
circuits such as resonant tunneling diodes (RTDs) may be 100 to 1000 times 
more efficient than the best of today's circuits.  

Below 180 nm circuits will begin to use the atomic structure of matter.  
One atom digital circuits are now being addressed in the laboratory and new 
revolutionary techniques will have to be developed to interconnect and 
manufacture atomic level circuits. As you indicated in your question 
quantum mechanical effects such as Pauli's will play a role at the atomic 
level of complexity. Some people have predicted photonic computers (photons 
as bits) will lead to smaller, faster logic circuits; however, to date the 
success of photonic computing has been very poor.

We still have more than a factor of 1000 to go before we reach quantum 
limits. Today if you wanted to put a city library in random access memory 
chips (RAM) on a circuit board (for nanosecond access), the board would be 
the size of a tennis court. In the next 10 years the library board will be 
the size of a tennis racket!  Applications for this much computer power are 
difficult to forecast, yet man has always been able to find uses for 
increased functionality.

Best regards, your Mad Scientist
Adrian Popa